A liquid crystal display device (LCD) has low power consumption and excellent portability and is spotlighted as the next generation high-tech display device.
The LCD is one of non-luminescent image display devices. The LCD includes a color filter substrate, an array substrate including thin film transistors (TFTs), and a liquid crystal layer formed by injecting liquid crystal into a space between the color filter substrate and the array substrate. The LCD displays an image using the difference in light reflectivity due to the anisotropy of the liquid crystal.
An active matrix LCD, in which TFTs and pixel electrodes are arranged in a matrix configuration, are widely used because it provides a good resolution and has an excellent capability of displaying a motion picture.
The LCD includes a liquid crystal panel on which liquid crystal cells are arranged in a matrix configuration, and driving circuits for driving the liquid crystal panel.
In the liquid crystal panel, gate lines are arranged to intersect data lines and the liquid crystal cells are formed in regions defined by the intersections.
In the liquid crystal panel, a common electrode and pixel electrodes are provided to supply an electric field to the respective liquid crystal cells. Each of the pixel electrodes is connected to one of the data lines through source/drain terminals of a TFT serving as a switching device.
A gate terminal of the switching TFT is connected to one of the gate lines that are configured to apply pixel voltage signals to the pixel electrodes on a line basis.
The driving circuit includes a gate driver for driving the gate lines, a data driver for driving the data lines, and a common voltage generator for driving the common electrode. The gate driver supplies a scanning signal (i.e., a gate signal) sequentially to the gate lines to drive the liquid crystal cells on the liquid crystal panel sequentially on a line basis. The data driver supplies a data voltage signal to each of the data lines every time when the gate signal is supplied to one of the gate lines. The common voltage generator supplies a common voltage signal to the common electrode.
In this way, the LCD displays an image by adjusting the light transmittance of each of the liquid crystal cells by the electric field that are applied between the pixel electrode and the common electrode in response to the data voltage signal.
The driving circuits are electrically connected to corresponding signal lines in a pixel region through electrode pads in the liquid crystal panel, to supply driving signals to the corresponding signal lines. The electrode pad is electrically connected through an electrode link to the corresponding signal line of the pixel region.
In the case of the above LCD, the number of pixels has increased for display of a high-resolution image and thus the widths of lines and the distances between the lines have decreased to a fine level.
Accordingly, the electrode link connected between the electrode pad and the corresponding signal line of the pixel region are positioned such that the gate lines have different lengths. Consequently, the gate lines have different resistances due to their different lengths.
FIG. 1 is a schematic view of a gate line/pad in a related art LCD. FIG. 2 is an expanded plan view of a gate pad/link in the related art LCD of FIG. 1.
Referring to FIGS. 1 and 2, a gate pad 112 connected to a gate driver circuit (not illustrated) is formed in an edge region of a lower substrate 110.
The gate pad 112 receives a driving signal from a gate driver circuit line 115 and supplies the driving signal through a gate link 100 to a gate line (GL) 111 disposed in a pixel region 114.
The detailed structures of the gate pad 112 and the gate link 100 are illustrated in FIG. 2. The gate link 100 includes a gate line 111 formed on the lower substrate 110, a gate pad 112 connected to the gate line 111, a passivation layer (not illustrated) and a gate insulation layer (not illustrated) that are stacked on the lower substrate 110 (where the gate pad 112 is formed), in which gate pad hole 120 is formed to expose a pad region, and transparent electrode pattern 118 coated to contact the exposed gate pad 112.
The transparent electrode pattern 118 is connected to the gate driver circuit line 115 through a gate link hole 121 that is formed to penetrate the gate insulation layer and the passivation layer.
As illustrated in FIG. 2, gate lines 111 (GL1, GL2, GL3, GL4 and GL5) have different lengths according to their positions but have the same width and thickness.
Therefore, the gate lines 111 (GL1, GL2, GL3, GL4 and GL5) have different resistances due to their different lengths.
In particular, there is a large resistance difference between the longest and the shortest of the gate lines 111. Due to this resistance difference, different initial bias voltages are applied to the gate pads 112. Accordingly, gate signals applied to the gate lines of the pixel region 114 are distorted thereby degrading the image quality.
Also, when a driving signal is applied to the gate driver circuit lines 115, the corresponding resistances increase from a center region to an edge region.
Such a resistance difference also occurs in a data link that is connected between a data line of the pixel region and a data pad connected to a data driver circuit line.
This resistance difference due to a difference in the length of the data line also distorts a data signal applied to the data line of the pixel region, thereby degrading the image quality.
Also, when a driving signal is applied to data driver circuit lines, the corresponding resistances increase from a center region to an edge region.
In a related art in-plane-switching (IPS) LCD, when forming a common voltage applying unit in the outer region of an LCD panel, it is designed such that the number of contacts between a source electrode and a common electrode is identical to the number of contacts between a drain electrode and the common electrode. In this structure, a resistance component increases away from the center of the common voltage applying unit. This makes it impossible to uniformly maintain a common voltage in the LCD panel, thus degrading the image quality characteristics of the LCD panel.